Name
Abstract | ||
|---|---|---|
The NaNoC project is progressing toward an innovative design platform for multicore systems based on future networks-on-chip. This platform enables the design, manufacturing and management of networks-on-chip by tackling new requirements of future systems like virtualization, power, thermal and application management, as well as new challenges in technology scaling like reliability and variability. The introduction of networks-on-chip into the platform enables a component-oriented architectural design which is out of reach of current design methods. This paper presents an overview of the achievements at the end of the second out of three years of planned activities. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1145/2107763.2107775 | Proceedings of the 2012 Interconnection Network Architecture: On-Chip, Multi-Chip Workshop |
Keywords | DocType | Citations |
application management,innovative design platform,ultimate network-on-chip,new requirement,current design method,new challenge,future system,nanoc project,component-oriented architectural design,multicore system,future networks-on-chip,network on chip,chip,design method,design flow,research project | Conference | 1 |
PageRank | References | Authors |
0.36 | 8 | 9 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| A. Strano | 1 | 1 | 0.36 |
| Davide Bertozzi | 2 | 1653 | 99.83 |
| F. Angiolini | 3 | 144 | 8.26 |
| L. Di Gregorio | 4 | 1 | 0.36 |
| F. O. Sem-Jacobsen | 5 | 9 | 0.94 |
| V. Todorov | 6 | 1 | 0.36 |
| J. Flich | 7 | 775 | 52.09 |
| F. Silla | 8 | 173 | 16.36 |
| T. Bjerregaard | 9 | 6 | 0.75 |