Name
Abstract | ||
|---|---|---|
It takes about four to five weeks to fabricate a semiconductor memory device. During the fabrication process, there are possibilities to cause defects on fabricating a final product. It would be very difficult to repair a memory device fabricated with numerous defects. However, in case of a small number of defects, it is desirable to repair and reuse as a defective die (standard unit measuring a device on a wafer) rather than to discard it, because reusing is an essential element for memory device manufactures to effectively cut costs. To perform the reuse, laser-repair process and redundancy analysis for setting is needed to find an accurate target in the laser-repair process. In this paper, cost reduction has been attempted by saving time in carrying out a new type of redundancy analysis, after simulating each defect. |
Year | Venue | Keywords |
|---|---|---|
2009 | SpringSim | laser-repair process,memory device,essential element,defective die,accurate target,fabrication process,cost reduction,yield improvement,semiconductor memory device,semiconductor manufacturing,redundancy analysis,final product,redundancy analysis simulation,eds,correlation |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
5 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Youngshin Han | 1 | 27 | 8.28 |
| Chil-Gee Lee | 2 | 47 | 16.85 |
| Jason J. Jung | 3 | 1451 | 135.51 |