Name
Abstract | ||
|---|---|---|
This paper presents an analysis on energy dissipation of digital half-band filters operating in the sub-threshold (sub-VT) region with throughput and supply voltage constraints. A 12-bit filter is implemented along with various unfolded structures, used to form a decimation filter chain. The designs are synthesized in a 65 nm low-leakage CMOS technology with various threshold voltages. A sub-VT energy model is applied to characterize the designs in the sub-VT domain. The results show that the low-leakage standard-threshold technology is suitable for the required throughput range between 250 Ksamples/s and 2 Msamples/s, at a supply voltage of 260 mV. The total energy dissipation of the filter is 205 fJ per sample. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISCAS.2011.5937696 | Circuits and Systems |
Keywords | Field | DocType |
CMOS digital integrated circuits,digital filters,design exploration,digital half-band filters,energy 205 fJ,energy dissipation,low-leakage standard-threshold technology,size 65 nm,sub-VT CMOS digital decimation filter chain,sub-VT energy model,sub-threshold region,supply voltage constraints,threshold voltage,voltage 260 mV,word length 12 bit | Logic gate,Decimation,Digital filter,Dissipation,Computer science,Voltage,Electronic engineering,CMOS,Throughput,Threshold voltage,Electrical engineering | Conference |
ISSN | ISBN | Citations |
0271-4302 E-ISBN : 978-1-4244-9472-9 | 978-1-4244-9472-9 | 2 |
PageRank | References | Authors |
0.52 | 2 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| S. M. Yasser Sherazi | 1 | 12 | 3.29 |
| Peter Nilsson | 2 | 59 | 10.04 |
| Omer Can Akgun | 3 | 43 | 6.98 |
| Henrik Sjöland | 4 | 77 | 21.81 |
| Joachim Neves Rodrigues | 5 | 83 | 18.00 |