Title
Low power high-speed multithreshold voltage CMOS bus architectures
Abstract
Low power, high-speed bus architectures, based on low swing voltage technique, using multithreshold voltage transistors are proposed in this paper. Three different classes of driver/repeater/receiver circuits are introduced. The driver circuits are comprised of high threshold voltage MOSFET transistors, in order to reduce their output swing level voltage. For re-pulling up the low swing voltage to full swing, innovated high-speed, cross-coupled latch, voltage receiver circuits are used. In applications having high load capacitance due to long interconnections, novel repeater circuits based also on multithreshold voltage technology are introduced. Using 0.5 μm multithreshold voltage process technology and 1 V supply voltage, SPICE measurements showed up to 45% improvement in the power delay product.
Year
DOI
Venue
2004
10.1016/j.compeleceng.2003.08.001
Computers & Electrical Engineering
Keywords
Field
DocType
Low power,Low swing,Drivers,Receivers,Repeaters,Multithreshold
CPU core voltage,Computer science,Voltage optimisation,Overdrive voltage,CMOS,Electronic engineering,Voltage regulation,Electrical engineering,Threshold voltage,Dropout voltage,Voltage divider
Journal
Volume
Issue
ISSN
30
4
0045-7906
Citations 
PageRank 
References 
0
0.34
10
Authors
2
Name
Order
Citations
PageRank
Abdoul Rjoub145.84
Odysseas Koufopavlou28915.92