Title
Using Partial-Run-Time Reconfigurable Hardware to accelerate Video Processing in Driver Assistance System
Abstract
In this paper we show a reconfigurable hardware architecture for the acceleration of video-based driver assistance applications in future automotive systems. The concept is based on a separation of pixel-level operations and high level application code. Pixel-level operations are accelerated by coprocessors, whereas high level application code is implemented fully programmable on standard PowerPC CPU cores to allow flexibility for new algorithms. In addition, the application code is able to dynamically reconfigure the coprocessors available on the system, allowing for a much larger set of hardware accelerated functionality than would normally fit onto a device. This process makes use of the partial dynamic reconfiguration capabilities of Xilinx Virtex FPGAs
Year
DOI
Venue
2007
10.1109/DATE.2007.364642
DATE
Keywords
Field
DocType
video signal processing,future automotive system,larger set,reconfigurable hardware architecture,reconfigurable architectures,video processing,partial-run-time reconfigurable hardware,application code,xilinx virtex fpga,partial dynamic reconfiguration capabilities,video-based driver assistance application,partial dynamic reconfiguration capability,high level application code,coprocessors,new algorithm,pixel-level operation,real-time systems,driver assistance system,xilinx virtex fpgas,hardware accelerator,automotive engineering,system on a chip,signal processing,acceleration,real time systems,reconfigurable hardware,hardware
Video processing,System on a chip,Computer science,Parallel computing,Field-programmable gate array,Real-time computing,Virtex,Coprocessor,PowerPC,Control reconfiguration,Embedded system,Reconfigurable computing
Conference
ISSN
ISBN
Citations 
1530-1591
978-3-9810801-2-4
39
PageRank 
References 
Authors
2.74
7
4
Name
Order
Citations
PageRank
Christopher Claus122120.39
Johannes Zeppenfeld210410.19
Florian Müller3392.74
Walter Stechele436552.77