Title
Energy-Constrained VDD Hopping Scheme with Run-Time Power Estimation for Low-Power Real-Time VLSI Systems
Abstract
In this paper, we propose a novel dynamic voltage scaling algorithm on a variable-voltage processor. It determines the supply voltage on timeslot-by-timeslot basis within the task boundary, and significantly reduces the power consumption by fully exploiting the slack time. Also, we modify this algorithm and propose an energy-constrained dynamic voltage scaling algorithm for low-power multimedia applications. In the multimedia applications, there axe usually several alternative algorithms with different performance and power. Considering the trade-off between performance and power, the proposed algorithm adaptively determines the optimal alternative to achieve optimal performance under given energy constraint. Compared with the conventional algorithms, the power consumption is reduced to 1/14.4 similar to 1/5.6 without performance degradation.
Year
DOI
Venue
2002
10.1142/S0218126602000653
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Keywords
Field
DocType
low power,dynamic voltage scaling,voltage hopping,energy scalable
Dynamic voltage scaling,Computer science,Control theory,Voltage,Electronic engineering,Vlsi systems,Least slack time scheduling,Energy constraint,Power consumption
Journal
Volume
Issue
ISSN
11
6
0218-1266
Citations 
PageRank 
References 
1
0.39
9
Authors
3
Name
Order
Citations
PageRank
Seongsoo Lee145274.97
Seungjun Lee2216.20
Takayasu Sakurai31039280.69