Name
Abstract | ||
|---|---|---|
Most existing hardware design verification techniques (logic simulation, symbolic simulation etc.), as well as the design phase, are rather synthetic. This paper discusses an analytic verification technique with examples of its application. This technique employs backward symbolic simuation, or causality tracing, which is carried out from the negation of a proposition which should be verified. Analyticity this technique has, not only makes verification powerful but gives it another feature, design error diagnosis. |
Year | DOI | Venue |
|---|---|---|
1982 | 10.1109/DAC.1982.1585591 | DAC |
Keywords | DocType | ISBN |
design error diagnosis,existing hardware design verification,analytic verification technique,logic simulation,design phase,symbolic simuation,cad,logic design,application software,user interface,registers,hardware,automata | Conference | 0-89791-020-6 |
Citations | PageRank | References |
6 | 7.95 | 4 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| fumihiro maruyama | 1 | 44 | 25.75 |
| Takao Uehara | 2 | 48 | 33.66 |
| Nobuaki Kawato | 3 | 105 | 79.03 |
| Takao Saito | 4 | 33 | 24.81 |