Abstract | ||
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One of the significant sources of power consumption of a conventional UHF passive RFID tag is the input data decoding procedure. These tags use a high frequency clocked symbol decoder block to implement the decoding process. This paper proposes a low-area low-power data driven decoder that eliminates the need for a high frequency oscillator, counter and an explicit clock, which are generally used by the conventional symbol RFID tag decoders. The proposed data driven unit consisting of a decoder including a CRC-16 block has been designed and implemented. The postlayout simulation results of the proposed symbol decoder clearly show that there is a significant reduction in power consumption when compared to a conventional decoder unit of a UHF passive tag that was also designed using the same tools and libraries. |
Year | DOI | Venue |
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2012 | 10.1166/jolpe.2012.1169 | JOURNAL OF LOW POWER ELECTRONICS |
Keywords | DocType | Volume |
Low-Power Design, Data Driven, Symbol Decoder, RFID Simulation, RFID Tag | Journal | 8 |
Issue | ISSN | Citations |
1 | 1546-1998 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Vyasa Sai | 1 | 6 | 2.33 |
Ajay Ogirala | 2 | 9 | 3.73 |
Marlin H. Mickle | 3 | 65 | 17.89 |