Name
Title | ||
|---|---|---|
Symbolic modeling of a universal reconfigurable logic gate and its applications to circuit synthesis |
Abstract | ||
|---|---|---|
With the help of a simple reconfigurable logic gate that emulates conjunction, implication and a 1-bit memory cell, we devise a mechanism for synthesizing fine grained circuits that overlap multiple logic functions. The use of the gate as an integrated combinational and sequential logic building block enables processor architectures that naturally avoid the von Neumann bottleneck and support fine grained parallel execution. A symbolic model of the approach, including an exact synthesizer for small circuits, is provided as a literate Haskell program, available from http://logic.csci.unt.edu/tarau/research/2012/fsyn.hs. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1145/2401603.2401688 | RACS |
Keywords | Field | DocType |
universal reconfigurable logic gate,fine grained circuit,fine grained parallel execution,integrated combinational,exact synthesizer,symbolic modeling,emulates conjunction,multiple logic function,simple reconfigurable logic gate,1-bit memory cell,circuit synthesis,sequential logic building block,literate haskell program | Logic gate,Computer architecture,Sequential logic,Pass transistor logic,Computer science,Logic optimization,Programmable logic array,Resistor–transistor logic,Logic family,Programmable logic device | Conference |
Citations | PageRank | References |
0 | 0.34 | 11 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Paul Tarau | 1 | 1529 | 113.14 |
| Brenda Luderman | 2 | 13 | 2.42 |