Title
A temperature-insensitive self-recharging circuitry used in DRAMs
Abstract
This paper presents a practical self-recharging circuitry for DRAMs. The proposed self-recharging circuitry not only reduces the standby power by monitoring the voltage drop caused by the data loss of a memory cell but also adjusts the recharging period of the memory cell that results from leakage currents. The proposed design is insensitive to temperature variations. A 1-Kb DRAM using our design is fabritcated by a TSMC 0.35-µm 1P4M CMOS process. The physical measurement of the proposed design on silicon verifies the correctness of the proposed circuitry.
Year
DOI
Venue
2005
10.1109/TVLSI.2004.842878
IEEE Trans. VLSI Syst.
Keywords
Field
DocType
physical measurement,cmos process,self- recharge,index terms— adaptive self-recharging circuitry,proposed self-recharging circuitry,dram,proposed circuitry,temperature-insensitive self-recharging circuitry,data loss,practical self-recharging circuitry,1-kb dram,leakage current,memory cell,proposed design,power generation,integrated circuit design,circuits,silicon,threshold voltage,indexing terms,temperature
Dram,Dynamic random-access memory,Standby power,Leakage (electronics),Computer science,Voltage drop,Electronic engineering,Integrated circuit design,Integrated circuit,Electrical engineering,Memory cell
Journal
Volume
Issue
ISSN
13
3
1063-8210
Citations 
PageRank 
References 
2
0.65
2
Authors
3
Name
Order
Citations
PageRank
Chua-chin Wang1474107.39
Yih-Long Tseng2467.68
Chih-Chiang Chiu3122.10