Name
Abstract | ||
|---|---|---|
.1The function level evolvable hardware approach to synthesizethe combinational multiple-valued and binary logic functions isproposed in first time. The new representation of logic gate in extrinsicEHW allows us to describe behaviour of any multi-input multi-outputlogic function. The circuit is represented in the form of connections andfunctionalities of a rectangular array of building blocks. Each buildingblock can implement primitive logic function or any multi-input... |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1007/978-3-540-46239-2_5 | EuroGP |
Keywords | Field | DocType |
extrinsic function-level evolvable hardware,logic gate | Arithmetic function,Logic gate,Adder,Computer science,Multiplier (economics),Theoretical computer science,Evolvable hardware,Binary logic,Rectangular array,Binary number | Conference |
Volume | ISSN | ISBN |
1802 | 0302-9743 | 3-540-67339-3 |
Citations | PageRank | References |
16 | 0.97 | 13 |
Authors | ||
1 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tatiana Kalganova | 1 | 195 | 15.96 |