Paper Info
Title
Limits and Power of the Simplest Uniform and Self-Stabilizing Phase Clock Algorithm
Abstract
This paper examines two Network Interface Card micro-architectures that support low latency, high bandwidth user-level message passing in multi-user environments. The two are at different ends of a design spectrum -- the Resident queues design relies ...
Year
DOI
Venue
2000
10.1109/IPDPS.2000.846033
IPDPS
Keywords
Field
DocType
self-stabilizing phase,low latency,different end,high bandwidth user-level message,network interface card micro-architectures,resident queues design,simplest uniform,multi-user environment,clock algorithm,design spectrum,clock synchronization,satisfiability,synchronization,protocols,synchronisation,fault tolerant,distributed systems,fault tolerance,self stabilization,distributed system,distributed processing
Prime (order theory),Graph,Synchronization,Computer science,Algorithm,Self-stabilization,Clock synchronization,Divisor,Distributed computing
Conference
ISBN
Citations 
PageRank 
0-7695-0574-0
0
0.34
References 
Authors
4
2
Name
Order
Citations
PageRank
Florent Nolot1439.57
Vincent Villain254445.77