Abstract | ||
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A statistical model is considered for clock skew in which the propagation delays on every source-to-processor path are sums of independent contributions, and are identically distributed. Upper bounds are derived for expected skew, and its variance, in tree distribution systems with N synchronously clocked processing elements. The results are applied to two special cases of clock distribution. In the first, the metric-free model, the total delay in each buffer stage is Gaussian with a variance independent of stage number. In this case, the upper bound on skew grows as Theta (log N). The second, metric, model, is meant to reflect VLSI constraints. Here, the clock delay in a stage is Gaussian with a variance proportional to wire length, and the distribution tree is an H-tree embedded in the plane. In this case, the upper bound on expected skew is Theta (N/sup 1/4/ (log N)/sup 1/2/). |
Year | DOI | Venue |
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1990 | 10.1109/12.61068 | IEEE Trans. Computers |
Keywords | Field | DocType |
n synchronously clocked processing,synchronous systems,buffer stage,clock delay,expected skew,distribution tree,stage number,clock skew,upper bound,statistical model,expected clock skew,metric-free model,clock distribution,propagation delay,fault detection,system testing,polynomials,distributed system,very large scale integration,h tree | Binary logarithm,Synchronization,Upper and lower bounds,Parallel computing,Real-time computing,Clock skew,Gaussian,Independent and identically distributed random variables,Skew,Mathematics,H tree | Journal |
Volume | Issue | ISSN |
39 | 12 | 0018-9340 |
Citations | PageRank | References |
9 | 1.23 | 4 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Steven D. Kugelmass | 1 | 10 | 1.72 |
Kenneth Steiglitz | 2 | 1128 | 660.13 |