Name
Abstract | ||
|---|---|---|
Multiprocessors are about to become prevalent in the PC world. Major CPU vendors such as Intel and Advanced Micro Devices have recently announced their imminent migration to multicore processors. Affine partitioning provides a systematic framework to find asymptotically optimal computation and data decomposition for multiprocessors, including multicore processors. This affine framework uniformly models a large class of high-level optimizations such as loop interchange, reversal, skewing, fusion, fission, re-indexing, scaling, and statement reordering. However, the resulting code after applying affine transformations tends to contain more loop levels and complex conditional expressions. This impacts performance, code readability and debuggability for both programmers and compiler developers. To facilitate the adoption of affine partitioning in industry, we address the above practical issues by proposing a salient two-step algorithm: coalesce and optimize. The coalescing algorithm maintains valid code throughout and improves readability and debuggability. We demonstrate with examples that the optimization algorithm simplifies the resulting loop structures, conditional expressions and array access functions and generates efficient code |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/ICPADS.2005.12 | ICPADS (2) |
Keywords | Field | DocType |
resulting code,optimisation,cpu vendor,valid code,coalescing algorithm,array access function,efficient code,multicore processor,program debugging,optimization algorithm,conditional expression,affine transformation,affine framework,multiprocessing systems,loop structure,code generation algorithm,affine partitioning,code readability,program control structures,multiprocessor,loop interchange,loop level,code debuggability,advanced micro devices,intel,affine partitioning framework,program compilers,parallel processing,code generation,indexation,application software,central processing unit,concurrent computing,multicore processors,multicore processing | Affine transformation,Computer science,Real-time computing,Loop interchange,Multi-core processor,Code (cryptography),Distributed computing,Central processing unit,Parallel computing,Algorithm,Multiprocessing,Compiler,Concurrent computing | Conference |
Volume | ISSN | ISBN |
2 | 1521-9097 | 0-7695-2281-5 |
Citations | PageRank | References |
1 | 0.36 | 5 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shih-wei Liao | 1 | 703 | 92.73 |
| Zhaohui Du | 2 | 196 | 12.76 |
| Gansha Wu | 3 | 107 | 9.06 |
| Guei-Yuan Lueh | 4 | 401 | 37.41 |