Title
Analog implementation of SNR based gain adaptation for denoising
Abstract
In the current work, a novel analog hardware to denoise speech signals has been proposed and simulated in 0.5 mum VLSI technology. The system is based on Automatic Gain Control which suppresses the noisy parts while boosting clean intervals of a signal. Further, the architecture is devised using Operational Transconductance Amplifiers (OTA) operating in sub-threshold region for attaining high programmability, low power and also to facilitate testing on an RASP 2.7 FPAA Prototype. A test noisy signal of 5 dB SNR when applied to the system resulted in a 13.5 dB improved output SNR consuming 0.53 mW power from a 1.6 V supply.
Year
DOI
Venue
2009
10.1109/ISCAS.2009.5117737
2009 IEEE International Symposium on Circuits and Systems (ISCAS)
Keywords
Field
DocType
analog hardware implementation,SNR based gain adaptation,speech signal denoising,VLSI technology,sub-threshold region,RASP 2.7 FPAA Prototype,automatic gain control,noise suppression,OTA,operational transconductance amplifier,size 0.5 mum,power 0.53 mW,voltage 1.6 V
Speech processing,Noise measurement,Computer science,Signal-to-noise ratio,Operational transconductance amplifier,Electronic engineering,Field-programmable analog array,Automatic gain control,Operational amplifier,Amplifier
Conference
ISSN
ISBN
Citations 
0271-4302
978-1-4244-3827-3
0
PageRank 
References 
Authors
0.34
2
2
Name
Order
Citations
PageRank
Krishna T. Malladi124918.37
David V. Anderson241875.23