Name
Title | ||
|---|---|---|
HW/SW Interface Synthesis Based on Avalon Bus Specification for Nios-Oriented SoC Design |
Abstract | ||
|---|---|---|
HW/SW interface synthesis plays an important role in Systems-on-Chip design. In this paper, we propose a new HW/SW interface synthesis design method aiming at the Nios-based SoC platform. Our main motivation is to separate the consideration of interface circuits from HW/SW modules design, leaving SW modules in the Nios processor and HW modules in the FPGA as peripherals. Different interface circuits will be kept as templates in interface library customized for different bus structures and transfer modes. When interface synthesizing, HW modules themselves are left with no changes; they only need to select different interface templates from the library according to the structure and tran, fer mode of the bus they connect to. The experimental results show this design methodology can efficiently solve the HW/SW interface synthesis problems on the Nios platform mentioned above well. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/FPT.2005.1568573 | FPT 05: 2005 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS |
Keywords | Field | DocType |
interface synthesis,interface model,bus,specification,Nios processor | Logic synthesis,Computer architecture,System on a chip,Computer science,Interface circuits,Field-programmable gate array,Design methods,Real-time computing,Template,Embedded system | Conference |
Citations | PageRank | References |
2 | 0.39 | 3 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Feng Lin | 1 | 201 | 34.79 |
| Haili Wang | 2 | 17 | 4.48 |
| Jinian Bian | 3 | 175 | 31.31 |