Name
Abstract | ||
|---|---|---|
The consideration of an embedded device's power consumption and its management is increasingly important nowadays. Currently, it is not easily possible to integrate power information already during the platform exploration phase. In this paper, we discuss the design challenges of today's heterogeneous HW/SW systems regarding power and complexity, both for platform vendors as well as system integrators. As a result, we propose a design flow concept that combines system-level power optimization techniques with platform-based rapid prototyping. Virtual executable prototypes are generated from MARTE/UML and functional C/C++ descriptions, which then allows to study different platforms, mapping alternatives and power management strategies. Our proposed flow combines system-level timing and power estimation techniques available in commercial tools with platform-based rapid prototyping. We propose an efficient code annotation technique for timing and power properties that enables fast host execution as well as adaptive collection of power traces. Combined with a flexible design-space exploration (DSE) approach our flow allows a trade-off between different platforms, mapping alternatives, and optimization techniques, based on domain-specific workload scenarios. The proposed flow is currently under implementation in the COMPLEX FP7 European integrated project. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/DSD.2012.31 | Digital System Design |
Keywords | Field | DocType |
mapping alternative,power management strategy,power information,power estimation technique,power management,platform-based design space exploration,power property,proposed flow,power consumption,system-level power optimization technique,power trace,different platform,integrated circuit design,embedded systems,system on chip,codesign | Power management,Computer architecture,Power optimization,Model-driven architecture,Computer science,Design flow,Real-time computing,Platform-based design,Design space exploration,Executable,Virtual prototyping,Embedded system | Conference |
ISBN | Citations | PageRank |
978-1-4673-2498-4 | 4 | 0.46 |
References | Authors | |
4 | 14 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kim Gruttner | 1 | 6 | 0.84 |
| Philipp A. Hartmann | 2 | 83 | 10.26 |
| Kai Hylla | 3 | 25 | 2.82 |
| Sven Rosinger | 4 | 36 | 4.03 |
| Wolfgang Nebel | 5 | 484 | 76.22 |
| Fernando Herrera | 6 | 140 | 14.53 |
| Eugenio Villar | 7 | 263 | 33.11 |
| C. Brandolese | 8 | 165 | 18.13 |
| William Fornaciari | 9 | 543 | 67.45 |
| Gianluca Palermo | 10 | 938 | 75.81 |
| Chantal Ykman-Couvreur | 11 | 198 | 19.02 |
| Davide Quaglia | 12 | 190 | 25.14 |
| Francisco Ferrero | 13 | 55 | 3.64 |
| Raul Valencia | 14 | 4 | 0.46 |