Paper Info
Title
Co-optimization of buffer layer and FTL in high-performance flash-based storage systems
Abstract
NAND flash-based storage devices have rapidly improved their position in the secondary storage market ranging from mobile embedded systems to personal computer and enterprise storage systems. Recently, the most important issue of NAND flash-based storage systems is the performance of random writes as well as sequential writes, which strongly depends on their two main software layers: a Buffer Management Layer (BML) and a Flash Translation Layer (FTL). The primary goal of our study is to highly improve the overall performance of NAND flash-based storage systems by exploiting the cooperation between those two layers. In this paper, we propose an FTL-aware BML policy called Selective Block Padding and a BML-based FTL algorithm called Optimized Switch Merge, which overcome the limitations of existing approaches on performance enhancement. When using both the proposed techniques, evaluation results show that the throughput is significantly increased over that of previous studies.
Year
DOI
Venue
2010
10.1007/s10617-010-9066-y
Design Automation for Embedded Systems
Keywords
Field
DocType
Buffer management layer,Flash translation layer,NAND flash memory,Solid state drive
Nand flash memory,Flash file system,Enterprise storage,Computer science,Parallel computing,Personal computer,NAND gate,Ranging,Solid-state drive,Embedded system,Auxiliary memory
Journal
Volume
Issue
ISSN
14
4
0929-5585
Citations 
PageRank 
References 
5
0.45
26
Authors
5
Name
Order
Citations
PageRank
Hyotaek Shim1575.21
Dawoon Jung236720.19
Jaegeuk Kim3534.38
Jin-Soo Kim41806122.94
Seungryoul Maeng573047.58