Title
Processor array architectures for flexible approximate string matching
Abstract
In this paper, we present linear processor array architectures for flexible approximate string matching. These architectures are based on parallel realization of dynamic programming and non-deterministic finite automaton algorithms. The algorithms consist of two phases, i.e. preprocessing and searching. Then, starting from the data dependence graphs of the searching phase, parallel algorithms are derived, which can be realized directly onto special purpose processor array architectures for approximate string matching. Further, the preprocessing phase is also accommodated onto the same processor array designs. Finally, the proposed architectures support flexible patterns i.e. patterns with a ''don't care'' symbol, patterns with a complement symbol and patterns with a class symbol.
Year
DOI
Venue
2008
10.1016/j.sysarc.2007.03.004
Journal of Systems Architecture - Embedded Systems Design
Keywords
Field
DocType
parallel algorithm,application specific processor arrays,flexible approximate string matching,flexible pattern,parallel algorithms,parallel realization,approximate string matching,linear processor array architecture,processor array design,preprocessing phase,class symbol,vlsi architectures,special purpose processor array
String searching algorithm,Dynamic programming,Computer science,Processor array,Parallel algorithm,Symbol,Parallel computing,Finite-state machine,Preprocessor,Approximate string matching
Journal
Volume
Issue
ISSN
54
1-2
Journal of Systems Architecture
Citations 
PageRank 
References 
1
0.36
30
Authors
2
Name
Order
Citations
PageRank
Panagiotis D. Michailidis16011.16
Konstantinos G. Margaritis230345.46