Title
A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18μm CMOS with 5.8GHz ERBW
Abstract
We present a 4-bit power scalable flash analog-to-digital converter in digital 0.18-μm CMOS, targeting low power ultra-wide band receivers. To minimize static power consumption, we exploit dynamic comparators with built-in digitally tunable thresholds. The converter has been realized and tested outperforming recent comparable designs even in more advanced technologies. The main performance figures include 5.8GHz effective resolution bandwidth and 0.8pJ/conversion-step at 1-GS/s and Nyquist conditions.
Year
DOI
Venue
2006
10.1145/1146909.1147132
DAC
Keywords
Field
DocType
dynamic comparators,low power ultra-wide band,effective resolution bandwidth,advanced technology,4-bit power scalable,built-in digitally tunable threshold,static power consumption,m cmos,nyquist condition,analog-to-digital converter,comparators,low power electronics,4 bit,radio receivers,performance,design,measurment,ultra wide band
4-bit,Comparator,Computer science,Effective resolution bandwidth,Electronic engineering,Analog-to-digital converter,CMOS,Ultra-wideband,Electrical engineering,Low-power electronics,Scalability
Conference
ISBN
Citations 
PageRank 
1-59593-381-6
9
2.15
References 
Authors
7
6
Name
Order
Citations
PageRank
P. Nuzzo1334.74
G. Van der Plas232835.68
F. De Bernardinis3428.86
L. Van der Perre433830.09
B. Gyselinckx534735.01
P. Terreni6265.52