Title
Two New Space-Time Triple Modular Redundancy Techniques for Improving Fault Tolerance of Computer Systems
Abstract
Triple Modular Redundancy (TMR) is widely used to improve fault tolerance of computer systems against transient faults. Conventional TMR is effective in protecting sequential circuits but can¿t mask transient faults in combinational circuits. New redundancy techniques called Space-Time TMR (ST-TMR) and Enhanced ST-TMR (EST-TMR) with double edge triggered registers are presented in this paper, which improve fault tolerance of both combinational circuits and sequential circuits. ST-TMR is effective in protecting throughput circuit while EST-TMR is effective in protecting state-machine circuit. This paper demonstrates the usefulness of ST-TMR and EST-TMR in two special case studies. The overhead and fault tolerance of ST-TMR and EST-TMR are compared with that of the conventional TMR. Results show that ST-TMR and EST-TMR are more effective.
Year
DOI
Venue
2006
10.1109/CIT.2006.189
CIT
Keywords
Field
DocType
state-machine circuit,space-time tmr,throughput circuit,enhanced st-tmr,improving fault tolerance,fault tolerance,conventional tmr,sequential circuit,computer systems,transient fault,mask transient fault,redundancy techniques,combinational circuit,new space-time triple modular,throughput,combinational circuits,sequential circuits,fault tolerant,state machine,space time,registers,redundancy
Space time,Sequential logic,Computer science,Triple modular redundancy,Real-time computing,Combinational logic,Redundancy (engineering),Fault tolerance,Throughput,Special case
Conference
ISBN
Citations 
PageRank 
0-7695-2687-X
5
0.57
References 
Authors
2
5
Name
Order
Citations
PageRank
Wei Chen15710.51
Rui Gong251.58
Kui Dai313526.08
Fang Liu41188125.46
Zhi-Ying Wang5870127.04