Title
Load-balanced combined input-crosspoint buffered packet switch and long round-trip times
Abstract
The amount of memory in buffered crossbars is proportional to the number of crosspoints, or O(N2), where N is the number of ports, and to the crosspoint buffer size, which is defined by the distance between the line cards and the buffered crossbar, to achieve 100% throughput under high-speed data flows. A long distance between these two components can make a buffered crossbar costly to implement. In this letter, we propose a load-balanced combined input-crosspoint buffered packet switch that uses small crosspoint buffers and no speedup. The proposed switch reduces the required size of the crosspoint buffers by a factor of N and keeps the cells in sequence.
Year
DOI
Venue
2005
10.1109/LCOMM.2005.1461697
IEEE Communications Letters
Keywords
Field
DocType
Packet switching,Optical buffering,Optical switches,Optical packet switching,Throughput,Space technology,Load management,High speed optical techniques,Image motion analysis,Timing
Line card,Load balancing (computing),Computer science,Parallel computing,Real-time computing,Packet switch,Packet switching,Round-trip delay time,Throughput,Crossbar switch,Speedup
Journal
Volume
Issue
ISSN
9
7
1089-7798
Citations 
PageRank 
References 
6
0.57
3
Authors
3
Name
Order
Citations
PageRank
Roberto Rojas-Cessa130847.00
Ziqian Dong210113.99
Zhen Guo312017.54