Name
Abstract | ||
|---|---|---|
DDFS-driven PLL synthesizer has a high frequency resolution and wide frequency bandwidth. Since the output of DDFS is a synthesized analog signal, a waveform shaper is needed to provide the digital input for a DDFS-driven PLL synthesizer using the digital type phase detector. Furthermore, a lot of components in a DDFS unit can increase the switching time and the power consumption. In this paper, we propose a new design method of a DDFS-driven PLL synthesizer, which does not need the waveform shaper as well as the extra circuits of DDFS. As a result, the proposed method makes improvements to such quality factors as switching time and power consumption, compared with the conventional DDFS-driven PLL frequency synthesizer |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1109/30.920440 | IEEE Trans. Consumer Electronics |
Keywords | Field | DocType |
Phase locked loops,Frequency synthesizers,Energy consumption,Signal resolution,Bandwidth,Signal synthesis,Phase detection,Detectors,Design methodology,Circuits | Phase-locked loop,Switching time,Computer science,PLL multibit,Waveform,Frequency synthesizer,Electronic engineering,Analog signal,Phase detector,Direct digital synthesizer | Journal |
Volume | Issue | ISSN |
47 | 1 | 0098-3063 |
Citations | PageRank | References |
4 | 1.12 | 4 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Heung-Gyoon Ryu | 1 | 218 | 51.71 |
| Yun-Young Kim | 2 | 7 | 2.89 |
| Hyeong-Man Yu | 3 | 5 | 1.74 |
| Sang-Burm Ryu | 4 | 5 | 1.74 |