Paper Info
Title
Design Methodology and CAD Tools for Prototyping Delta-Sigma Fractional-N Frequency Synthesizers
Abstract
In this paper we present the design flow for a fractional-N (frac-N) frequency synthesizer prototype from the system level conceptualization of the PLL to its hardware implementation. The prototyping hardware consists of a of frac-N PLL IC designed in TSMC 0.18ìm mixed signal/RF CMOS process mounted on a RF prototype impedance controlled board. The RF board is interfaced to a digital delta sigma modulator (DSM) realized in a Xilinx FPGA on a commercial evaluation board. Matlab was employed for the system level PLL design. The TSMC 0.18ìm CMOS Process Design Kit was used for the frac-N IC realization. Verilog HDL was used for the implementation of the DSM in the FPGA. With an FPGA based DSM platform, prototypes for different communication modulation formats, and for different DSM topologies, different order integrators, and different dithering schemes can be evaluated quickly and economically. We elaborate on our software selection for the design flow in the University environment. In addition to discussing the prototype design methodology, we present the simulated and measured results for the MASH-11 and MASH- 12 frac-N synthesizers. The prototype encompassed all possible aspects of a complex hardware system design: an IC design, RF board design, board-to-board interface issues and the Verilog coding of DSMs in an FPGA. This process served as a useful tool for learning the various aspects of RF hardware design.
Year
DOI
Venue
2007
10.1109/RSP.2007.20
IEEE International Workshop on Rapid System Prototyping
Keywords
Field
DocType
design flow,rf prototype impedance,system level pll design,prototype design methodology,rf cmos process,rf board,design methodology,rf board design,complex hardware system design,prototyping delta-sigma fractional-n frequency,ic design,rf hardware design,cad tools,prototypes,field programmable gate arrays,hardware description languages,frequency synthesizer,process design,delta sigma modulation,cmos integrated circuits,system design,radio frequency,phase locked loops,design automation,integrated circuit design,high level synthesis
Computer science,High-level synthesis,Software prototyping,FPGA prototype,Field-programmable gate array,Design flow,Integrated circuit design,Verilog,Hardware description language,Embedded system
Conference
ISSN
ISBN
Citations 
1074-6005
0-7695-2834-1
0
PageRank 
References 
Authors
0.34
5
4
Name
Order
Citations
PageRank
Himanshu Arora1779.54
Nikolaus Klemmer2226.52
Thomas Jochum301.01
Patrick Wolf4256.72