Name
Abstract | ||
|---|---|---|
One of the problems designers have to cope with in WSI implementation of neural nets is their extreme connectivity requirements. The present paper presents an architecture capable of implementing feed-forward neural nets. The architecture is constituted of regular buiding blocks allowing faster design and higher density. A second architecture derived from the previous one and scoring better area exploting is then discussed. |
Year | DOI | Venue |
|---|---|---|
1990 | 10.1016/0165-6074(90)90163-4 | Microprocessing and Microprogramming |
Keywords | DocType | Volume |
silicon structure,area compaction | Journal | 28 |
Issue | ISSN | Citations |
1-5 | Microprocessing and Microprogramming | 1 |
PageRank | References | Authors |
0.50 | 0 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| F. Distante | 1 | 8 | 2.28 |
| M. G. Sami | 2 | 54 | 8.19 |
| Stefanelli, R. | 3 | 16 | 4.82 |
| G. S. Gajani | 4 | 19 | 2.14 |