Title
Increasing design space of the instruction queue with tag coding
Abstract
The instruction queue is a critical component and performance bottleneck in superscalar microprocessors. Conventional designs use physical register identifiers to wake up instructions. This paper proposes decoupling the tags for instruction wakeup from the tags for physical register access, thus increasing the design space of the instruction queue by encoding its operand tags. Two coding methods have been developed. One uses a linear code to increase the Hamming distance between tags, reducing the tag match delay by more than 50% and achieving 12% improvement in the total wakeup/select delay for TSMC 0.18mm technology at 1.8v. The second method uses one-hot code to encode the operand tag, removing the tag OR and tag read operations from the wakeup/select loop. For a 32-entry instruction queue, 15% reduction in the wakeup/select loop has been achieved. Furthermore, one-hot code also removes the dissipation-on-mismatch in the wakeup logic, significantly reducing the dynamic power consumption of the instruction queue.
Year
DOI
Venue
2005
10.1145/1057661.1057757
ACM Great Lakes Symposium on VLSI
Keywords
Field
DocType
wakeup logic,instruction queue,design space,instruction wakeup,total wakeup,32-entry instruction queue,one-hot code,linear code,select loop,tag coding,tag match delay,operand tag,hamming distance
Bottleneck,Computer science,Operand,Queue,Coding (social sciences),Real-time computing,Hamming distance,Dynamic demand,Linear code,Computer hardware,Encoding (memory)
Conference
ISBN
Citations 
PageRank 
1-59593-057-4
0
0.34
References 
Authors
5
2
Name
Order
Citations
PageRank
Junwei Zhou111816.64
Andrew Mason200.34