Paper Info
Title
Chip assembly in the PLAYOUT VLSI design system
Abstract
Chip assembly in PLAYOUT is especially designed for a top-down chip planning design style. A simple example of a three-level hierarchy shows the new design strategy. Three-phase chip planning and chip assembly have a close interaction to guarantee an exchange of constraints between levels of the hierarchy. Chip assembly is composed of two different functions: cell synthesis and cell assembly. For cell synthesis standard cell block layout is used to demonstrate a new strategy. Instead of generating the layouts of blocks in the same floorplan independently, layout proceeds in parallel and constraints like pin positions, shape and position of the blocks in the floorplan are exchanged dynamically. This method resulted in excellent adjustment of pin positions between cells and thus a reduction of channel widths. Independent of the cell synthesis strategy is cell assembly viewed as a topological compaction problem to refine the floorplans. A genetic algorithm is shown to solve this problem. Initial experimental results show the advantages of our new strategies.
Year
DOI
Venue
1992
10.1109/EURDAC.1992.246240
EURO-DAC '92 Proceedings of the conference on European design automation
Keywords
Field
DocType
chip assembly,playout vlsi design system,very large scale integration,floorplan,genetic algorithm,vlsi design,top down,genetic algorithms,geometry,chip,vlsi,routing,shape
Design strategy,Computer science,Parallel computing,Communication channel,Chip,Standard cell,Hierarchy,Very-large-scale integration,Genetic algorithm,Floorplan
Conference
ISBN
Citations 
PageRank 
0-8186-2780-8
3
0.52
References 
Authors
11
2
Name
Order
Citations
PageRank
Klaus Glasmacher130.52
Gerhard Zimmermann28221.78