Title
Timing driven cell replication during placement for cycle time optimization
Abstract
This paper presents a new timing driven approach for cell replication tailored to the practical needs of standard cell layout design. Cell replication methods have been studied extensively in the context of generic partitioning problems. However, until now it has remained unclear what practical benefit can be obtained from this concept in a realistic environment for timing-driven layout synthesis. Therfore, this paper presents a timing-driven cell replication procedure, demonstrates its incorporation into a standard cell placement and routing tool and, for the first time, examines its benefit on the final circuit performance in comparison with conventional gate- or transistor-sizing techniques. The proposed method relies on recursively duplicating cells located on timing-critical paths. Cell duplications are selected with the objective to reduce the length of the critical nets as well as to simplify the routing task for these nets. Additionally, the fanout load of a cell driving such a net is reduced. Experimental results demonstrate the usefulness of the proposed methodology and suggest that cell replication should be an integral part of the physical design flow complementing traditional gate sizing techniques.
Year
DOI
Venue
1999
10.1016/S0167-9260(99)00003-6
Integration
Keywords
Field
DocType
cell replication,cycle time optimization,circuit partitioning,timing driven circuit design,placement,circuit design,physical design,critical path,cycle time
Digital electronics,Page layout,Computer science,Circuit design,Electronic engineering,Real-time computing,Standard cell,Physical design,Cell cycle,Integrated circuit,Recursion
Journal
Volume
Issue
ISSN
27
2
Integration, the VLSI Journal
Citations 
PageRank 
References 
0
0.34
6
Authors
2
Name
Order
Citations
PageRank
Ingmar Neumann1306.56
Hans-Ulrich Post202.03