Name
Title | ||
|---|---|---|
Power-Aware Deterministic Block Allocation for Low-Power Way-Selective Cache Structure |
Abstract | ||
|---|---|---|
This paper proposes a power-aware cache block allocation algorithm for the way-selective set-associative cache on embedded systems to reduce energy consumption without additional delay or performance degradation. For this goal, way selection logic and specialized replacement policy are designed to enable only one way of set-associative cache as in the direct-mapped cache. Overall cache access time becomes almost the same as that of conventional set associative cache with accessing additional way selection logic. Because data array can be accessed without waiting for tag comparison, multiplexer delay can be removed totally. The simulation result shows that the proposed architecture can reduce a per access power consumption by 59% over conventional set-associative caches with average 0.06% of negligible performance loss. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/ICCD.2004.1347896 | ICCD |
Keywords | Field | DocType |
overall cache access time,conventional set-associative cache,direct-mapped cache,power-aware cache block allocation,power-aware deterministic block allocation,access power consumption,set-associative cache,selection logic,low-power way-selective cache structure,additional delay,way-selective set-associative cache,conventional set associative cache,embedded systems,low power electronics,embedded system | Cache-oblivious algorithm,Cache invalidation,Cache pollution,Cache,Computer science,Parallel computing,Real-time computing,Page cache,Cache algorithms,Cache coloring,Smart Cache,Embedded system | Conference |
ISSN | ISBN | Citations |
1063-6404 | 0-7695-2231-9 | 4 |
PageRank | References | Authors |
0.46 | 12 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jung-Wook Park | 1 | 130 | 28.62 |
| Gi-Ho Park | 2 | 76 | 17.47 |
| Sungbae Park | 3 | 49 | 10.97 |
| Shin-dug Kim | 4 | 430 | 73.79 |