Name
Abstract | ||
|---|---|---|
The latched comparator is utilized in virtually all analog-to-digital converter architectures. It uses a positive feedback mechanism to regenerate the analog input signal into a full-scale digital level. Such high voltage variations in the regeneration nodes are coupled to the input, disturbing the input voltage - kickback noise. This paper reviews existing solutions to minimize the kickback noise and proposes two new ones. HSPICE simulations verify the effectiveness of our techniques. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/ISCAS.2004.1328250 | 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS |
Keywords | Field | DocType |
degradation,positive feedback,voltage,impedance,positive feedback mechanism,high voltage,cmos integrated circuits,parasitic capacitance,cmos technology,feedback | Parasitic capacitance,Comparator,Computer science,Spice,Voltage,CMOS,Analog-to-digital converter,Electronic engineering,Analog signal,High voltage,Electrical engineering | Conference |
Citations | PageRank | References |
7 | 0.81 | 3 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pedro M. Figueiredo | 1 | 40 | 12.16 |
| J. C. Vital | 2 | 41 | 6.55 |