Abstract | ||
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Most features in commercial simulation packages are often omitted in parallel simulation benchmarks, because they neither affect the overall correctness of the simulation protocol nor the benchmark's performance. In our work on parallel simulation of a wafer fabrication plant, we however find several features which complicate the implementation of the simulation protocol and affect the program performance. One such feature is the dispatch rules which a machine set uses to decide the priority of the waiting wafer lots. In a sequential simulation, the dispatch rule can be implemented in a straightforward fashion, because the whole system state is at the same simulation time, and the rule simply reads the state variables (of any machine, resources, etc.) In a parallel simulation, the dispatch rule computation may be complicated by the fact that different portions of the simulated system can be at different simulation times. This paper describes our study of the implementation of dispatch rules in parallel simulation. This is actually an instance of the little-studied problem of providing shared-state information in parallel simulation. We briefly survey previous related work. We then outline two different approaches for a dispatch rule to access the shared-state information and compare them in terms of their ease of implementation |
Year | DOI | Venue |
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1998 | 10.1109/WSC.1998.746034 | Winter Simulation Conference |
Keywords | Field | DocType |
time warp simulation,waiting wafer lot priority,parallel processing,dispatching,parallel manufacturing simulation,implementation ease,integrated circuit manufacture,production engineering computing,dispatch rule,production control,simulation protocol,dispatch rules,queueing theory,system state,shared-state information,electronics industry,program performance,commercial simulation packages,simulation times,parallel simulation benchmarks,wafer fabrication plant,simulation protocol correctness,state variables,electronic engineering computing,computational modeling,fabrication,concurrent computing,packaging,protocols,business communication | Production control,Computer science,Simulation,Wafer fabrication,Correctness,Implementation,Queueing theory,Electronics,State variable,Computation | Conference |
Volume | ISBN | Citations |
2 | 0-7803-5133-9 | 2 |
PageRank | References | Authors |
0.55 | 6 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Chu-Cheow Lim | 1 | 168 | 14.45 |
Yoke-Hean Low | 2 | 54 | 7.74 |
Boon-Ping Gan | 3 | 68 | 9.08 |
Sanjay Jain | 4 | 1647 | 177.87 |