Name
Abstract | ||
|---|---|---|
If the computational demands of an interactive gra- phics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accelerators may be utilised on multi-GPU based systems such as SLI (1) or Crossfire (2) or by a cluster of PCs in conjunction with a soft- ware infrastructure. Typically these PC cluster solutions allow the application programmer to use a standard OpenGL API. In this paper we describe an FPGA based hardware architecture, which provides an interface for multiple commodity graphics ac- celerators. Our scalable parallel rendering architecture aims to accelerate graphics applications using a tightly coupled hybrid system of parallel commodity GPUs and reconfigurable hardwa- re (3), while providing similar services to the above mentioned approach. This is work in progress. So far, we have designed and manufactured the required custom-hardware. Currently, we are focussing on implementing the shared-memory subsystem. on while providing substantial additional computational re- sources that may be used to control the GPUs. These re- configurable components are an integral part of the scalable shared-memory graphics cluster and consequently increase the programmability of the parallel rendering system in the same way that vertex and pixel shaders have increased the programmability of graphics pipelines. Current scalable high-performance graphics systems are either constructed using special purpose graphics acceler ati- on hardware or built as a cluster of commodity components with a software infrastructure that can exploit multiple gr a- phics cards (5, 6). These solutions are used in application domains where computational demand cannot be met by a single commodity graphics card e.g., large-scale scientifi c visualisation. The former approach tends to provide the hig- hest performance but is expensive because it requires fre- quent redesign of the special purpose graphics acceleration hardware in order to maintain a performance advantage over commodity graphics hardware. The latter approach, while more affordable and scalable, has intrinsic performance dra- wbacks due to the computationally expensive communica- tion between the individual graphics pipelines. The advent of recent technologies by ATI and nVidia also allows for the creation multi-GPU systems. Our hybrid architecture aims to bridge the gap between all of these solutions by offering a minimal custom-built hardware component together with a novel and efficient shared memory infrastructure that can exploit modern consumer graphics hardware. |
Year | Venue | Keywords |
|---|---|---|
2007 | ERSA | shared-memory,pcb,hardware-dsm,sci,fpga,gpu,work in progress,shared memory,hybrid system,parallel rendering,hardware architecture,graphics hardware |
Field | DocType | Citations |
Graphics,Computer architecture,Parallel rendering,GPU cluster,Computer science,Graphics processing unit,Rendering (computer graphics),OpenGL,Hardware architecture,Reconfigurable computing | Conference | 1 |
PageRank | References | Authors |
0.36 | 9 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ross Brennan | 1 | 8 | 1.89 |
| Michael Manzke | 2 | 44 | 9.19 |
| Keith O'Conor | 3 | 100 | 7.54 |
| John Dingliana | 4 | 282 | 24.15 |
| Carol O'Sullivan | 5 | 825 | 48.93 |