Paper Info
Title
Design and analysis of a reduced phase error digital carrier recovery architecture for high-order quadrature amplitude modulation signals
Abstract
With increasing order of quadrature amplitude modulation (QAM), the bandwidth efficiency is improved in digital communication. However, in practice, the modulation order is limited, since conventional digital carrier recovery (CR) algorithms give rise to unacceptable phase error. The authors present an efficient software-aided technique for phase error reduction in CR for high-order QAM, based on the simple and well-known fourth power CR loop. Analytical and simulation results indicate that the new technique has several attractive features such as approximate of invariance of phase error improvement over modulation order and low hardware complexity for modulation orders as high as 256-QAM. Experimental results for 64 and 256-QAM illustrate phase error variance of less than -110-dBc/Hz at the frequency offset of 10-kHz, that is, 30-dB reduction of phase error variance or 3-dB increase in system processing gain compared to the conventional fourth power CR loop. This allows a significant improvement of bandwidth efficiency by increasing the modulation order, at the cost of slight complexity overhead.
Year
DOI
Venue
2010
10.1049/iet-com.2009.0762
IET Communications
Keywords
Field
DocType
bandwidth efficiency,high-order quadrature amplitude modulation signals,digital communication,qam,system processing gain,quadrature amplitude modulation,phase error digital carrier recovery architecture
Quadrature modulation,Modulation order,Carrierless amplitude phase modulation,Quadrature amplitude modulation,Computer science,Control theory,Continuous phase modulation,Analog transmission,Modulation error ratio,Pulse-amplitude modulation
Journal
Volume
Issue
ISSN
4
18
1751-8628
Citations 
PageRank 
References 
1
0.35
7
Authors
2
Name
Order
Citations
PageRank
Babak Bornoosh110.69
Abdolreza Nabavi24717.09