Name
Abstract | ||
|---|---|---|
A digital intensive Clock Recovery Circuit applied to HF-Band active RFID tag is proposed in this paper. Based on the signal interface of ISO/IEC 14443 Type-A protocol, in order to achieve the coherent demodulation in receiving mode, a modified digital intensive PLL is utilized to accurately extract the carrier's frequency and phase information from the received ASK 100% modulation signal. Meanwhile, in transmitting mode, the proposed PLL can also effectively calibrate the system clock's frequency error and phase deviation in a discontinuous mode. The whole chip of Clock Recovery Circuit was implemented in 180 mu m EEPROM technology. The measurement results show that the maximum power consumption of Clock Recovery Circuit is about 900 mu W at 1.8V power supply, and the phase deviation in the demodulation and modulation period is respectively less than 10 degrees and 20 degrees. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1587/elex.11.20140138 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
Clock Recovery Circuit (CRC), HF-Band, Radio Frequency Identification (RFID), Phase Locked Loop (PLL), Time-to-Digital Converter (TDC) | Clock recovery,Computer science,Electronic engineering,Time-to-digital converter | Journal |
Volume | Issue | ISSN |
11 | 7 | 1349-2543 |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sichen Yu | 1 | 1 | 0.73 |
| Zhonghan Shen | 2 | 0 | 0.34 |
| Xiaolu Liu | 3 | 1 | 1.07 |
| Huixiang Han | 4 | 1 | 0.73 |
| Xi Tan | 5 | 73 | 14.27 |
| Yan Na | 6 | 12 | 9.20 |
| Min Hao | 7 | 11 | 4.81 |