Title
CA-Ex: a tuning-incremental methodology for communication architectures in embedded systems
Abstract
The communication architecture (CA) problem is at the very heart of system level design related to the development of distributed embedded systems. The design of efficient CAs is pivotal because communication is becoming the most important source of on-chip desired performance numbers. In this paper we focus on the aspects of CA design in heterogeneous systems consisting of arbitrarily linked multi-components, and introduce a new design methodology named CA-Ex which enables a tuning-incremental architecture exploration. Unlike previous research efforts, CA-Ex employs three kinds of optimization strategies to implement topology, mapping and scheduling scheme, and interface circuits. One of the major contributions is that we summarily present four architecting scenarios and outline a unified framework to achieve a specification-modeling-exploration process. Finally, we evaluate CA-Ex through an illustrative case study on JPEG decoder and describe its advantages.
Year
DOI
Venue
2004
null
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Keywords
Field
DocType
efficient cas,tuning-incremental architecture exploration,communication architecture,system level design,tuning-incremental methodology,heterogeneous system,architecting scenario,jpeg decoder,ca design,new design methodology,embedded system,chip,design methodology
Architecture,System on a chip,Computer science,Scheduling (computing),Electronic system-level design and verification,Real-time computing,Design methods,Design flow,Systems architecture,Software development,Distributed computing,Embedded system
Conference
Volume
Issue
ISSN
3605 LNCS
null
16113349
ISBN
Citations 
PageRank 
3-540-28128-2
0
0.34
References 
Authors
7
5
Name
Order
Citations
PageRank
Haili Wang1174.48
Jinian Bian217531.31
Yawen Niu300.68
Kun Tong401.35
Yunfeng Wang530931.38