Paper Info
Title
WormBench: a configurable workload for evaluating transactional memory systems
Abstract
Transactional Memory (TM) is a promising new technology that makes it possible to ease writing multi-threaded applications. Many different TM implementations exist, unfortunately most of those TM systems are currently evaluated by using workloads that are (1) tightly coupled to the interface of a particular TM implementation, (2) are small and lack to capture the common concurrency problems that exist in real multi-threaded applications and also (3) fail to evaluate the overall behavior of the Transactional Memory considering the complete software stack. WormBench is parameterized workload designed from the ground up to evaluate TM systems in terms of robustness and performance. Its goal is to provide an unified solution to the problems stated above (1, 2, 3). The critical sections in the code are marked with the atomic statements and thus proving a framework to test the compiler's ability to translate them properly and efficiently into the appropriate TM system interface. Its design considers the common synchronization problems that exist in TM multi-threaded applications. The behavior of WormBench can be changed by using run configurations which provide the ability to reproduce a runtime behavior observed in a typical multi-threaded application or a behavior that stresses a particular aspect of the TM system such as abort handling. In this paper, we analyze the transactional characteristics of WormBench by studying different run configurations and demonstrate how Worm-Bench can be configured to model the transactional behavior of an application from the STAMP benchmark suite.
Year
DOI
Venue
2008
10.1145/1509084.1509093
Proceedings of the 9th workshop on MEmory performance: DEaling with Applications, systems and architecture
Keywords
DocType
Citations 
different tm implementation,tm multi-threaded application,overall behavior,transactional behavior,runtime behavior,particular tm implementation,appropriate tm system interface,transactional memory system,configurable workload,multi-threaded application,transactional memory,tm system,critical section
Conference
11
PageRank 
References 
Authors
0.58
17
7
Name
Order
Citations
PageRank
Ferad Zyulkyarov11337.78
Adrian Cristal250032.64
Sanja Cvijic3111.25
Eduard Ayguade474149.83
Mateo Valero54520355.94
Osman Unsal616414.33
Tim Harris75393417.21