Title
Verification of arithmetic circuits using binary moment diagrams
Abstract
Abstract: Binary Moment Diagrams (BMDs) providea canonical representations for linear functions similarto the way Binary Decision Diagrams (BDDs) representBoolean functions. Within the class of linear functions,we can embed arbitrary functions from Boolean variablesto real, rational, or integer values. BMDs can thusmodel the functionality of data path circuits operatingover word level data. Many important functions, includinginteger multiplication, that cannot be representedefficiently at the...
Year
DOI
Venue
2001
10.1007/s100090100037
STTT
Keywords
Field
DocType
decision diagrams,computer arithmetic,formal verification,decision diagram,canonical representation,binary decision diagram
Arithmetic circuits,Arbitrary-precision arithmetic,Affine arithmetic,Computer science,Theoretical computer science,Binary scaling,Shear and moment diagram,Arithmetic circuit complexity,Binary number
Journal
Volume
Issue
Citations 
3
2
7
PageRank 
References 
Authors
0.46
24
2
Name
Order
Citations
PageRank
Randal E. Bryant192041194.64
Yirng-an Chen230423.80