Title
Representing mapping and scheduling decisions within dataflow graphs.
Abstract
Choosing the right programming model for multiprocessor System-on-Chip (MPSoC) platforms is a challenging task: in order to provide for automatic hardware/software synthesis in a model-based design flow, the system model should be architecture-independent on the one hand, but should also allow the back-annotation of architecture-dependent mapping and scheduling decisions on the other hand. Here, architecture-independent dataflow models are particularly suitable. In a dataflow model, concurrent processes (actors) communicate via packets transmitted over channels. However, the back-annotation process is difficult, and previous approaches are either restricted to static dataflow actors or static schedules. Also, the semantics of the underlying dataflow actors are often different from the semantics of the scheduling mechanism, which limits the compositionality of the dataflow model. In this paper, we propose a modeling approach which unifies the representation of dataflow actors and scheduling mechanisms, while also providing for both, dynamic dataflow actors and dynamic scheduling decisions. We describe how various scheduling schemes can be represented by our approach, and show the applicability of the proposed approach by means of synthetic dataflow graphs.
Year
Venue
Keywords
2013
FDL
dynamic scheduling,availability,semantics,schedules
Field
DocType
ISSN
Signal programming,Dataflow architecture,Programming paradigm,Fair-share scheduling,Scheduling (computing),Computer science,Real-time computing,Dataflow,Schedule,Dynamic priority scheduling,Distributed computing
Conference
1636-9874
Citations 
PageRank 
References 
1
0.38
0
Authors
5
Name
Order
Citations
PageRank
Christian Zebelein1385.43
Christian Haubelt279668.77
Joachim Falk321517.27
Tobias Schwarzer4275.60
Jürgen Teich52886273.54