Name
Title | ||
|---|---|---|
A digital front-end of 16-bit audio delta-sigma DAC with improved CSE method and novel DWA |
Abstract | ||
|---|---|---|
To achieve area-efficiency and high SNR, a novel digital front-end of a 16-bit audio DAC including a 4-stage interpolator and a 3rd-order delta-sigma (ΣΔ) modulator is proposed. An improved common subexpression elimination (CSE) method is used for implementing the interpolator to save the hardware overhead. And a novel data weighted averaging (DWA) technique named as dual cycle shifted DWA is applied to the 4-bit ΣΔ modulator to reduce the mismatch errors without introducing signal-dependent tones. Implemented in a standard 0.18-μm 1P6M LOGIC salicide process, the proposed design achieves a peak SNR of 103.9-dB and a DR of 104.3-dB, which proves that the proposed work achieves the design goal well. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/NEWCAS.2012.6329009 | NEWCAS |
Keywords | Field | DocType |
digital-to-analog converters,3rd-order delta-sigma modulator,improved common subexpression elimination method,interpolation,audio delta-sigma dac,digital front-end,word length 16 bit,standard logic salicide process,mismatch error reduction,4-stage interpolator,delta-sigma modulation,data weighted averaging technique,size 0.18 mum,cse method,dual cycle shifted dwa,word length 4 bit,snr,area-efficiency,hardware overhead,signal-to-noise ratio,σδ modulator,signal to noise ratio,modulation,cascading style sheets,hardware,finite impulse response filter,adders,delta sigma modulation | Common subexpression elimination,Computer science,Digital front end,Interpolation,16-bit,Salicide,Modulation,Electronic engineering,Delta-sigma modulation | Conference |
Volume | Issue | ISSN |
null | null | null |
ISBN | Citations | PageRank |
978-1-4673-0858-8 | 0 | 0.34 |
References | Authors | |
2 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jinchen Zhao | 1 | 0 | 0.34 |
| Xiaobo Wu | 2 | 9 | 4.88 |
| Menglian Zhao | 3 | 22 | 11.35 |