Title | ||
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An efficient cooperative design framework for SOC on-chip communication architecture system-level design |
Abstract | ||
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In this paper an efficient cooperative design framework is proposed to help SOC designers to construct their desired application-specific communication architectures. The proposed framework makes contributions as follows: (1) it outlines an approach of model refinement from one level of abstraction down to another closer to implementation; (2) it is particularly suitable for complex systems which consist of hundreds of processing elements (PEs) because it adopts a "divide-and-conquer" approach and provides the On-Chip Communication Architecture constructing method for PEs with compatible and incompatible protocols; (3) it can achieve a fine trade-off between system performance and implementation cost through a multi-objectives cost function taking into account of bus widths, bus load, cost for arbitration logic and transducers. The correctness and effectiveness of the method is evaluated through an illustrative JPEG decoder application. © Springer-Verlag Berlin Heidelberg 2007. |
Year | DOI | Venue |
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2006 | null | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
Keywords | Field | DocType |
null | Complex system,Communication architecture,Computer architecture,Design framework,Abstraction,Computer science,Correctness,Electronic system-level design and verification,JPEG,Arbitration,Distributed computing | Conference |
Volume | Issue | ISSN |
4402 LNCS | null | 16113349 |
Citations | PageRank | References |
0 | 0.34 | 4 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Niu Yawen | 1 | 0 | 0.34 |
Bian Jinian | 2 | 0 | 0.34 |
Haili Wang | 3 | 17 | 4.48 |
Tong Kun | 4 | 0 | 0.34 |