Paper Info
Title
LogSPoTM: a scalable thread level speculation model based on transactional memory
Abstract
Thread level speculation (TLS) and transactional memory (TM) are both proposed to address the problem of productivity in multi-core era. Both of them require similar underlying support. In this paper, we propose a low-design-complexity approach to effective unified support for both TLS & TM, by extending a scalable TM model to support TLS. The baseline TM model chosen is LogTM. A distributed hardware arbitration mechanism is also proposed to intensify scalability. This method takes advantage of hardware resources introduced by TM, resulting simplified hardware design. Moreover, it provides rich semantics of both TLS and TM to programmers. Five representative benchmarks have been adopted to evaluate performance characteristics of our TLS model under different memory access patterns. Influence of design choices such as interconnection is also studied. The evaluation shows that the new system performs well in most of the benchmarks in spite of its simplicity, resulting average region speedups around 3.5 at four threads.
Year
DOI
Venue
2008
10.1109/APCSAC.2008.4625443
ACSAC
Keywords
Field
DocType
hardware resources,distributed memory systems,memory access patterns,transactional memory,multicore productivity,logspotm,scalable thread level speculation model,distributed hardware arbitration mechanism,benchmark testing,protocols,hardware,thread level speculation,topology,network topology,system performance
Computer science,Parallel computing,Speculative multithreading,Network topology,Thread (computing),Real-time computing,Transactional memory,Software,Interconnection,Benchmark (computing),Distributed computing,Scalability
Conference
Volume
Issue
ISSN
null
null
null
ISBN
Citations 
PageRank 
978-1-4244-2683-6
7
0.46
References 
Authors
23
6
Name
Order
Citations
PageRank
Rui Guo1237.16
Hong An25824.15
Ruiling Dou370.46
Ming Cong42816.39
Yaobin Wang5315.77
Qi Li616830.51