Name
Abstract | ||
|---|---|---|
To confront the ISI caused by multipath in spread spectrum system, we proposed a hardware architecture of LMS equalizer based on FPGA using parallel processing, which greatly increased the number of iterations in a limited period, and accelerated the convergence of the algorithm. At the same time, the multiplier and the divider was optimized by using the internal hardware multiplier. Simulation results proved that the scheme almost had the same performance compared with the software result with high speed and less hardware consumption. © 2011 IEEE. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/WCSP.2011.6096798 | WCSP |
Keywords | Field | DocType |
field programmable gate array(fpga),least mean square(lms),parallel processing,spread spectrum communication,field programmable gate arrays,intersymbol interference,hardware architecture,least mean square,field programmable gate array,iterative methods,spread spectrum | Multipath propagation,Intersymbol interference,Computer science,Iterative method,Field-programmable gate array,Real-time computing,Multiplier (economics),Software,Spread spectrum,Hardware architecture | Conference |
Volume | Issue | ISSN |
null | null | null |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bingchao Liu | 1 | 0 | 0.68 |
| Li Fang | 2 | 0 | 0.68 |
| Daoben Li | 3 | 47 | 13.15 |