Name
Abstract | ||
|---|---|---|
In this paper we propose two new design techniques for floating point arithmetic units used in DSP applications, and apply them in the design of two multi-operand units for high-radix FFTs. These two multi-operand arithmetic units are a Modified two term Dot Product (MDP) unit and a Multi-operand Add-Sub unit (MAS). A radix-4 FFT butterfly computation block is implemented efficiently with these multi-operand units. Synthesis results show that the butterfly unit built with our design is about 43% faster and 9.5% smaller than a conventional implementation. © 2011 IEEE. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ASICON.2011.6157160 | ASICON |
Keywords | Field | DocType |
floating-point arithmetic,multi-operand floating-point operations,radix-4 fft butterfly,floating point,floating point arithmetic,adders,floating point unit,reduced instruction set computing,fast fourier transforms | Fixed-point arithmetic,Adder,Floating point,Computer science,Floating-point unit,Double-precision floating-point format,Operand,Parallel computing,Arithmetic logic unit,Binary scaling | Conference |
Volume | Issue | ISSN |
null | null | 2162755X |
Citations | PageRank | References |
2 | 0.37 | 5 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Zhang Zhang | 1 | 2 | 0.37 |
| Dongge Wang | 2 | 2 | 0.37 |
| Yuteng Pan | 3 | 2 | 0.37 |
| Dan Wang | 4 | 2 | 0.37 |
| Xiaofang Zhou | 5 | 5381 | 342.70 |
| Gerald E. Sobelman | 6 | 225 | 44.78 |