Name
Title | ||
|---|---|---|
Low-Complexity Hardware Design for Fast Solving LSPs With Coordinated Polynomial Solution |
Abstract | ||
|---|---|---|
This paper presents a low-complexity algorithm and the corresponding hardware based on the coordinated polynomial solutions for solving line spectrum pairs (LSPs). To improve the computation of LSPs, the enhanced Tschirnhaus transform (ETT) is proposed to accelerate the coordinated polynomial solution. The proposed ETT can replace fractional multiplication with addition and shift operations, so unnecessary operations are avoided. To further simplify the hardware of the ETT, three designs are presented: the preprocessing block (PPB), the iterative root-finding block (IRFB), and the closed-form solution block (CFSB). The PPB provides a design with less gate counts that can effectively transform LPCs into general-form polynomials. Such polynomials can be further decomposed into roots using the proposed IRFB based on the Birge-Vieta method. A pipeline-recursive framework is implemented in the IRFB to save calculations. To improve hardware utilization, this paper also analyzes the coefficients relationship of the ETT by introducing the data dependency graph to design the proposed functional blocks in CFSB. The experimental results show that the proposed hardware achieves a 40-fold improvement in throughput and reduces 1.16% of gate counts at the hardware synthesis level; the chip area is 1.29 mm2. The precision analysis indicates the average log spectral distance is 0.310. Moreover, the ETT in the proposed hardware only requires 29.9% of multiplication compared with the original one. Such results reveal that the proposed work is superior to the baseline work, thereby demonstrating the effectiveness of the proposed design. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/TVLSI.2014.2305699 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
lpc,linear predictive coding,enhanced tschirnhaus transform,ppb,hardware synthesis level,coordinated polynomial solutions,preprocessing block,coordinated polynomial solution,irfb,lsp,low-complexity algorithm,tschirnhaus transform.,line spectrum pairs (lsps),cfsb,tschirnhaus transform,iterative root-finding block,birge-vieta method,birge-vieta method (bvm),line spectrum pairs,ett,fractional multiplication,logic design,closed-form solution block,hardware design,graph theory,transforms,general-form polynomials,data dependency graph,logic gates,polynomials,pipeline-recursive framework,iterative methods,computer architecture,indexes,algorithm design and analysis,hardware | Data dependency graph,Algorithm design,Polynomial,Computer science,Algorithm,Electronic engineering,Chip,Multiplication,Preprocessor,Throughput,Computer hardware,Computation | Journal |
Volume | Issue | ISSN |
23 | 2 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 17 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chung-Hsien Chang | 1 | 6 | 2.92 |
| Bo-Wei Chen | 2 | 262 | 30.12 |
| Shi-Huang Chen | 3 | 3 | 1.18 |
| Jhing-fa Wang | 4 | 982 | 114.31 |
| Yu-Hao Chiu | 5 | 0 | 0.34 |