Name
Abstract | ||
|---|---|---|
Field Programmable Gate Arrays (FPGAs) rely heavily on complex routing architectures. The routing structures use programmable switches and account for a significant share in the total area, delay and power consumption numbers. With the ability of being monolithically integrated with CMOS chips, Resistive Random Access Memories (RRAMs) enable high-performance routing architectures through the replacement of Static Random Access Memory (SRAM)-based programming switches. Exploiting the very low on-resistance state achievable by RRAMs as well as the improved tolerance to power supply reduction, RRAM-based routing multiplexers can be used to significantly reduce the power consumption of FPGA systems with no performance compromises. By evaluating the opportunities of ultra-low-power RRAM-based FPGAs at the system level, we see an improvement of 12%, 26% and 81% in area, delay and power consumption at a mature technology node. |
Year | Venue | Keywords |
|---|---|---|
2015 | DATE | network routing,field programmable gate arrays,cmos integrated circuits,low power electronics,post silicon validation,switches,debug,resistive ram,routing,multiplexing |
DocType | ISSN | Citations |
Conference | 1530-1591 | 2 |
PageRank | References | Authors |
0.44 | 8 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pierre-Emmanuel Gaillardon | 1 | 355 | 55.32 |
| Xifan Tang | 2 | 59 | 12.89 |
| Jury Sandrini | 3 | 8 | 1.96 |
| Maxime Thammasack | 4 | 8 | 1.62 |
| Somayyeh Rahimian Omam | 5 | 2 | 0.44 |
| Davide Sacchetto | 6 | 20 | 4.17 |
| Yusuf Leblebici | 7 | 771 | 119.09 |
| Giovanni De Micheli | 8 | 10245 | 1018.13 |