Abstract | ||
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This paper presents a dual-mode Doherty long-term evolution (LTE) power amplifier (PA) for efficiency enhancement at power back-off. The amplifier utilizes transformer-based Doherty operation to achieve high back-off efficiency with good linearity. In addition, the PA has two power modes to further reduce the power consumption when low output power is required. The PA combines four push-pull amplifiers by using an symmetrical hybrid transformer that ensures low combining loss and high amplifier efficiency. The two-stage LTE amplifier is fabricated in standard 40nm CMOS technology and it achieves 28 dBm output power with 1.5 V supply. The peak power-added efficiency (PAE) of the amplifier is 34% and the PAE at 6 dB and 12 dB back-off levels are still as high as 25.5% and 19.7% respectively. The amplifier is tested with 20 MHz LTE signal and it satisfies the stringent ACLR and EVM requirements at 23.4 dBm output power with a PAE of 23.3%. In addition, the amplifier achieves 18.4% PAE when 6 dB lower power is transmitted and 11.1% PAE at 12 dB back-off under LTE modulation. |
Year | DOI | Venue |
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2015 | 10.1109/JSSC.2015.2422819 | Solid-State Circuits, IEEE Journal of |
Keywords | Field | DocType |
cmos technology,doherty power amplifier,power combining,series combining transformer,inductance,resistance,capacitance,topology,inductors | Computer science,Direct-coupled amplifier,Transformer,Electronic engineering,CMOS,Linear amplifier,Power-added efficiency,RF power amplifier,Electrical engineering,Power bandwidth,Amplifier | Journal |
Volume | Issue | ISSN |
PP | 99 | 0018-9200 |
Citations | PageRank | References |
7 | 0.53 | 10 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Ercan Kaymaksut | 1 | 39 | 3.95 |
Patrick Reynaert | 2 | 463 | 76.50 |