Abstract | ||
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In this paper, the impact on the bit error rate (BER) of the periodic non-uniform sampling implied by a power-gated analog-to-digital converter (ADC) is addressed in the specific case of a binary CPFSK receiver. Analytical and simulated lower bounds of the BER in an additive white Gaussian noise channel for several phase-based estimators are presented and discussed together with their dependency on the sampling synchronization. The main results are summarized in a practical abacus for Minimum Shift-Keying (MSK) modulation. Finally, the proposed techniques are evaluated against the IEEE 802.15.4 specification in MSK mode and lead to an active time ratio of the ADC of only 10% or less. Application of the proposed technique to a more competitive IEEE 802.15.4 compliant architecture available in the literature is also presented. |
Year | DOI | Venue |
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2015 | 10.1109/TCOMM.2015.2391094 | IEEE Transactions on Communications |
Keywords | Field | DocType |
Bit error rate,Power demand,Receivers,Synchronization,AWGN channels,Modulation,IEEE 802.15 Standards | Synchronization,Quadrature amplitude modulation,Computer science,Minimum-shift keying,Modulation,Electronic engineering,Sampling (statistics),Estimator,Bit error rate,Phase-shift keying | Journal |
Volume | Issue | ISSN |
63 | 3 | 0090-6778 |
Citations | PageRank | References |
2 | 0.43 | 13 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jean-François Pons | 1 | 2 | 0.43 |
Nicolas Dehaese | 2 | 18 | 5.99 |
Sylvain Bourdel | 3 | 41 | 14.05 |
Jean Gaubert | 4 | 42 | 9.62 |
Bruno Paille | 5 | 2 | 0.43 |