Title
Stochastic Iterative MIMO Detection System: Algorithm and Hardware Design
Abstract
In this paper, we propose a Stochastic iterative multiple-input multiple-output (SIM) detection system based on the Markov chain Monte Carlo (MCMC) method. To improve the detection performance, the Gibbs sampler of the MCMC detector in the SIM is updated by the decoded bits from a channel decoder directly. The channel decoder is part of the updating unit that generates the new samples in the MCMC updating process. We also implement the SIM in a fully parallel scheme, which achieves a high detection speed. As a case study, we have designed and synthesized a 128-parallel 4 × 4 16-QAM SIM system using a CMOS 130 nm technology with a core area of 1.98 mm 2 and 457K logic gates. The SIM detection system can achieve a throughput of 787.5Mbps with a frame error rate (FER) 10-3 at Eb/N0=7dB, equaling the FER of a traditional iterative MIMO detection with four outer iterations.
Year
DOI
Venue
2015
10.1109/TCSI.2015.2390558
IEEE Trans. on Circuits and Systems
Keywords
Field
DocType
gibbs sampler,decoded bits,multiple-input multiple-output (mimo) system,stochastic iterative mimo detection system,channel decoder,channel coding,stochastic iterative mimo (sim),mimo communication,markov chain monte carlo method,monte carlo methods,markov chain monte carlo (mcmc),frame error rate,error statistics,logic gates,markov processes,stochastic logic,detectors,hardware,decoding,throughput,mimo
Logic gate,Markov chain Monte Carlo,Computer science,MIMO,Algorithm,Electronic engineering,CMOS,Throughput,Detector,Frame error rate,Gibbs sampling
Journal
Volume
Issue
ISSN
62
4
1549-8328
Citations 
PageRank 
References 
6
0.48
22
Authors
3
Name
Order
Citations
PageRank
Jienan Chen18413.64
Hu Jianhao29620.56
Gerald E. Sobelman322544.78