Title
A 128-Stage Analog Accumulator for CMOS TDI Image Sensor
Abstract
The impacts of parasitic phenomenon on the performance of the analog accumulator in CMOS TDI image sensor are analyzed in this paper, and a modified accumulator with decoupling capacitor Cd to combat the parasitic phenomenon is also proposed. A 128-stage modified accumulator is designed and simulated. A prototype 1024 × 128 CMOS TDI image sensor with the 128-stage modified accumulator is fabricated in 0.18- μm one-poly four-metal 1.8 V/3.3 V CMOS technology. With a line rate of 3875 lines/s, at 128 stages the measured sensitivity and SNR improvement of the fabricated sensor are 617.1 V/lux·s and 16.6 dB respectively. The simulation and experiment results have proved the effectiveness of the decoupling capacitor Cd when combating the parasitic phenomenon in the analog accumulator. The proposed modified accumulator is suitable for application in CMOS TDI image sensor with high stages.
Year
DOI
Venue
2014
10.1109/TCSI.2014.2304663
IEEE Trans. on Circuits and Systems
Keywords
Field
DocType
cmos tdi image sensor,analogue circuits,cmos image sensors,parasitic capacitance,voltage 3.3 v,voltage 1.8 v,capacitors,size 0.18 mum,time delay integration camera,analog accumulator,signal-to-noise ratio (snr),modified accumulator,one poly four-metal cmos technology,cmos image sensor,time delay integration (tdi),decoupling capacitor,cmos technology,cmos integrated circuits,image sensors,signal to noise ratio,layout
Image sensor,CMOS,Electronic engineering,Decoupling capacitor,Electrical engineering,Mathematics,Accumulator (structured product)
Journal
Volume
Issue
ISSN
61
7
1549-8328
Citations 
PageRank 
References 
9
0.94
3
Authors
5
Name
Order
Citations
PageRank
Kaiming Nie1358.77
Suying Yao2479.18
Jiangtao Xu33112.56
Jing Gao4244.95
Yu Xia590.94