Paper Info
Title
Performance and power consumption evaluation of concurrent queue implementations in embedded systems
Abstract
Embedded and high performance computing (HPC) systems face many common challenges. One of them is the synchronization of the memory accesses in shared data. Concurrent queues have been extensively studied in the HPC domain and they are used in a wide variety of HPC applications. In this work, we evaluate a set of concurrent queue implementations in an embedded platform, in terms of execution time and power consumption. Our results show that by taking advantage of the embedded platform specifications, we achieve up to 28.2 % lower execution time and 6.8 % less power dissipation in comparison with the conventional lock-based queue implementation. We show that HPC applications utilizing concurrent queues can be efficiently implemented in embedded systems and that synchronization algorithms from the HPC domain can lead to optimal resource utilization of embedded platforms.
Year
DOI
Venue
2015
10.1007/s00450-014-0261-0
Computer Science - Research and Development
Keywords
Field
DocType
Multicore platforms, Concurrent data structures, Lock-free
Non-blocking algorithm,Lock (computer science),Computer science,Real-time computing,Implementation,Concurrent data structure,Power consumption,Distributed computing,Synchronization,Supercomputer,Parallel computing,Queue,Embedded system
Journal
Volume
Issue
ISSN
30
2
1865-2042
Citations 
PageRank 
References 
2
0.40
11
Authors
6
Name
Order
Citations
PageRank
Lazaros Papadopoulos1298.99
Ivan Walulya2125.96
Paul Renaud-Goud3356.57
Philippas Tsigas4120099.58
Dimitrios Soudris536958.95
Brendan Barry6302.75